The invention relates generally to communication and/or measurement systems and, more particularly, to systems that use spread spectrum modulation to convert relatively narrow-band information, or message, signals to wide-band signals for transmission.
Demand for bandwidth resources as well as consumer telecommunications applications will drive the development of low-cost, low-power short-range transceivers. More efficient use of bandwidth can be made by tiling a cellular wireless system using a greater number of shorter range transceivers. This approach is called Space Division Multiple Access (SDMA) to draw a parallel to Time and Code Division Multiple Access (TDMA and CDMA). In a cellular or multi-hop peer-to-peer network, messages hop from one transceiver to another across a field of transceivers. The basic idea behind SDMA is to simultaneously increase the density and decrease the range of transceivers, the result is an increase in maximum number of message packets that may be transmitted across the network at any given instant because each message occupies less physical space at any given instant in time. To avoid frequent packet collisions, however, each transceiver needs to be able to share the available spectrum.
In addition to their use in wireless networks, short range transceivers will soon find consumer application in the home, automobile, and likely in wearable or xe2x80x9cpersonal areaxe2x80x9d networks (PANs). If the internet is to become portable, then short range transceivers will become increasingly important for transmitting information over the last few meters to the user. Just as with present day cell phones, many of theses devices will need to be able to communication on a shared spectrum to a single base station. Therefore these transceivers require a low-cost, low-power, low-complexity scheme for channel sharing.
Direct Sequence Spread Spectrum (DS SS) offers an attractive solution to the channel sharing problem. The advantages of spread spectrum in general and DS SS in particular are manifold. Virtually all high performance commercial wireless systems employ DS SS. In addition to providing a simple scheme for channel code allocation, DS SS offers low peak power, excellent resistance to interference including interference from echoes known as multipath interference, easily scalable processing gain, excellent bandwidth efficiency when use in a micro-cell system, and graceful rather than catastrophic bit error rate (BER) degradation as more transceivers share the channel. In addition, improvements for DS SS systems are of interest for their applications in making high resolution timing measurements.
FIG. 1 illustrates a generalized functional block diagram of a spread spectrum communication system 10. The transmitter 20 includes a pseudo-random number (PN) generator 24 that generates a string of pseudo random bits known as a PN sequence, x(t). This PN sequence is a string of bits that appear random by statistical standards, but which are actually generated by a deterministic algorithm. The PN sequence is effectively the carrier signal. The modulator 28 modulates the PN sequence by the message signal, m(t), thereby producing the transmit signal, T(t). The transmit signal is a bit stream that behaves like white noise, but has data hidden in it.
A received signal, S(t), is received by a receiver 30. The received signal may be the transmit signal itself or it may be an attenuated and/or noisy version of the transmit signal due to interactions that occur over the transmission distance 14. A receiver, such as receiver 30 in FIG. 1, must have a PN synchronizer 34 to recover the message signal from the received signal. The PN synchronizer is a PN generator that produces the same PN sequence as that created by the PN generator 24 in the transmitter 20 and that synchronizes its own PN sequence with that of the received signal. The receiver uses the synchronized PN sequence to demodulate the received signal and recover the message signal. In the process, the receiver ignores all other data signals modulated by other PN sequences, which is how DS SS helps solve the channel sharing problem.
The communication system illustrated in FIG. 1 appears simple but is actually difficult to implement. The difficulty lies in getting the PN synchronizer 34 in the receiver 30 to generate a PN sequence that is synchronized with the PN sequence generated by the PN generator 24 in the transmitter 20. Achieving this synchronization is called code acquisition. Maintaining synchronization is called tracking.
State-of-the-art acquisition systems can have long and unpredictable acquisition times which make them unacceptable for multi-hop peer-to-peer networks which make and break connections often as they route traffic. Acquisition times much less than the time it takes to transmit a packet are desirable for a short range transceiver system. Present day acquisition systems are also power-hungry, because they use high-speed Digital Signal Processing (DSP) components. The energy consumption of these components scales linearly (at best) with the frequency of the operations they perform. State-of-the-art acquisition systems are also relatively expensive to manufacture because it is essentially impossible to integrate the high speed 3,5 semiconductor components they require with a baseband system for which standard silicon is adequate.
A typical spread spectrum communication system will include an Linear Feedback Shift Register (LFSR) as the PN generator 24 in the transmitter 20 of FIG. 1. The general equation for an LFSR follows:       x    n    =            ∑              i        =        1            N        ⁢          xe2x80x83        ⁢                  a        i            ⁢              xe2x80x83            ⁢              x                  n          -          1                    ⁢              xe2x80x83            ⁢              (                  mod          ⁢                      xe2x80x83                    ⁢          2                )            
From the theory of LFSR""s, xcex1N=1 always whereas xcex1i=1 sets a tap of a given delay n and xcex1i=0 sets no tap. The equation describes a delay line of length N, with taps at delays for which xcex1i=1. The outputs of the taps are summed mod 2 and then shifted into the register. All xn always takes a discrete value of either 0 or 1.
FIG. 2 illustrates a functional block diagram of a four-bin, two-tap LFSR that implements the following recursion relation:
x(t+xcfx84)=x(txe2x88x92xcfx84)+x(txe2x88x924xcfx84) mod 2
FIG. 2 shows four bins in series with the first and fourth bin tapped. A tap communicates the value of the tapped bin to the mod 2 addition functional element. The mod 2 addition functional element then communicates the result to the first bin. The LFSR operates recursively going through a complete PN sequence and then repeating it. A bin is essentially a delay element that holds the value that the previous bin had before it updated.
FIG. 3 is a functional block diagram of an analog PN generator, known as the Cosine Analog Feedback Shift Register (Cosine AFSR) and proposed by Grinstein et al. in U.S. Pat. No. 5,737,360. The Cosine AFSR represents the first attempt at an analog device that produces a PN sequence for use in a spread spectrum communication system. A spread spectrum communication system may include a Cosine AFSR as the PN generator 24 in the transmitter 20 of FIG. 1. Such a Cosine AFSR would directly feed back the output of the cosine function to the first bin. A spread spectrum communication system may also or alternatively include a Cosine AFSR as the PN sequencer 34 in the receiver 30 of FIG. 1. Such a Cosine AFSR would use the adder to superpose the received signal onto the output of the cosine finction. FIG. 3 specifically illustrates a Cosine AFSR that implements the following general equation:       x    n    =            1      2        ⁡          [              1        -                  cos          ⁢                      xe2x80x83                    ⁢                      (                          π              ⁢                              xe2x80x83                            ⁢                                                ∑                                      i                    =                    1                                    N                                ⁢                                  xe2x80x83                                ⁢                                                      a                    i                                    ⁢                                      xe2x80x83                                    ⁢                                      x                                          n                      -                      1                                                                                            )                              ]      
A flaw in the Grinstein et al. discrete time Cosine AFSR is revealed when one attempts to use it to synchronize with a noisy PN sequence. One thousand such trials were run. In the trials, successful acquisition was defined as having produced 2N+1 error-free chips identical to the transmit LFSR, where N is the number of bins in the register. A trial consisted of running a 15-bin DT Cosine AFSR for 400 chips or until it performed successful acquisition. With Gaussian noise on the transmit channel with a variance of 0.5, the Cosine AFSR never successfully performed acquisition within 400 chips.
Nonlinear differential equations and iterated maps can be used to emulate digital processing. The pseudo-random bit stream that is used as a pseudo-carrier in spread spectrum communication systems is typically generated by a linear feedback shift register. We have found, however, that an equivalent pseudo-random bit stream may be generated by a nonlinear dynamic system. The present invention utilizes a nonlinear dynamic system designed to generate and, in some embodiments, acquire the pseudo-random bit stream used in spread spectrum communication. The present invention represents an analog signal processing system derived from nonlinear dynamic system analysis.
As a result, the present invention may be implemented using analog components, which are typically cheaper than their more sophisticated digital counterparts. Further, analog signal processing promises to be less power-hungry and easier to integrate with other components than high-speed DSP. Finally, a discrete time embodiment of the present invention has been shown to acquire a noisy PN sequence whereas the prior art discrete time Cosine AFSR has failed to do so.
In general, in one aspect, the invention features a method for generating a pseudo-random noise sequence. An actuating signal is delayed by a first period to produce a first delayed actuating signal. The actuating signal is also delayed by an integer multiple of the first period to produce a second delayed actuating signal. A continuous, nonlinear function is applied to a first input that corresponds to the first delayed actuating signal and a second input that corresponds to the second delayed actuating signal to produce an output signal. The function has values that correspond to the binary integer values of a mod 2 addition function of a linear feedback shift register. The finction also has a non-zero slope at those values. Feeding back the output signal into the actuating signal causes the output signal to become a pseudo-random noise signal over time.
In general, in a second aspect, the invention features an apparatus for generating a pseudo-random noise sequence. The apparatus includes a delay element, a nonlinear element, and a feedback connection. The delay element produces a first delayed actuating signal and a second delayed actuating signal by delaying an actuating signal by a first period and a second period respectively. The second period is approximately an integer multiple of the first period. The first and second delay periods correspond to the tap placement in a conventional linear feedback shift register. The nonlinear element applies a continuous, nonlinear function to a first input that corresponds to the first delayed actuating signal and a second input that corresponds to the second delayed actuating signal to produce an output signal. The function has values that correspond to the binary integer values of a mod 2 addition function of a linear feedback shift register. The function also has a non-zero slope at those values. The feedback connection between the nonlinear element and the delay causes the output signal to become a pseudo-random noise signal over time.
The function that produces the output signal in the method and that is embodied by the nonlinear element in the apparatus may have a non-zero slope when the first input equals the second input and, additionally or alternatively, when the first input equals the negative of the second input plus a constant. In some embodiments, the output of the function is bounded by setting the output signal to a positive extreme value that corresponds to the one value of the mod 2 addition function of the linear feedback shift register whenever it is greater than or equal to the positive extreme value. In some embodiments, the output of the function is bounded by setting the output signal to a negative extreme value that corresponds to the zero value of the mod 2 addition function of the linear feedback shift register whenever it is less than or equal to negative extreme value. In one embodiment, the function approximates a quadratic function within the bounds. In a related embodiment, the function is a quadratic function. In a second embodiment, the function approximates an absolute value function within the bounds.
In some embodiments, the method further includes delaying the actuating signal by a third period to produce a third delayed actuating signal. The third period is approximately an integer multiple of the first period. In such embodiments, the output signal of the continuous, nonlinear function is considered a first output signal. The feeding back step includes applying a second continuous, nonlinear function to a third input that corresponds to the third delayed actuating signal and to a fourth input that corresponds to the first output signal to produce a second output signal. The second function has values that correspond to the binary integer values of the mod 2 addition function of a linear feedback shift register and a non-zero slope at those values. The second output signal is fed back to the actuating signal causing the second output signal to become a pseudo-random noise signal over time. This approach can be extended to add additional steps in which the actuating signal is delayed to create additional delayed actuating signals and in which additional nonlinear functions are applied to input that corresponds to either a delayed actuating signal or to an output signal from a previous step.
In some embodiments, the method further includes delaying the actuating signal by a third and a fourth period to produce a third and a fourth delayed actuating signal, respectively. The third and fourth periods are each approximately integer multiples of the first period. A second continuous, nonlinear function is applied to a third input that corresponds to the third delayed actuating signal and to a fourth input that corresponds to the fourth delayed actuating signal to produce a second output signal. In such embodiments, the output signal of the continuous, nonlinear function is considered a first output signal. The feeding back step includes applying a third continuous, nonlinear function to a fifth input that corresponds to the first output signal and to a sixth input that corresponds to the second output signal to produce a third output signal. The second and third functions have values that correspond to the binary integer values of the mod 2 addition function of a linear feedback shift register and non-zero slopes at those values. The third output signal is fed back to the actuating signal causing the third output signal to become a pseudo-random noise signal over time. Again, this approach can be extended to add additional steps in which the actuating signal is delayed to create additional delayed actuating signals and in which additional nonlinear functions are applied to input that corresponds to either a delayed actuating signal or to an output signal from a previous step.
In some embodiments of the apparatus, the delay element produces a third delayed actuating signal in which the delay period is approximately an integer multiple of the first period. In such embodiments, the feedback connection incorporates a second nonlinear element that applies a second continuous, nonlinear function to produce a second output signal. The second function has values that correspond to the binary integer values of the mod 2 addition function of a linear feedback shift register and a non-zero slope at those values. A third input that corresponds to the third delayed actuation signal and a fourth input that corresponds to the output signal from the original continuous, nonlinear function are input to the second function. The second output signal is communicated to the delay element causing the second output signal to become a pseudo-random noise signal over time.
In some embodiments of the apparatus, the delay element produces a third and fourth delayed actuating signal in which the delay periods are both approximately integer multiples of the first period. The apparatus further includes a second nonlinear element that applies a second continuous, nonlinear function to produce a second out put signal. A third input that corresponds to the third delayed actuation signal and a fourth input that corresponds to the fourth delayed actuation signal are input to the second function. In such embodiments, the feedback connection incorporates a third nonlinear element that applies a third continuous, nonlinear function to produce a third output signal. A fifth input that corresponds to the output signal of the original nonlinear element and a sixth input that corresponds to the second output signal are input to the second function. The third output signal is communicated to the delay element causing the third output signal to become a pseudo-random noise signal over time. The second and third functions have values that correspond to the binary integer values of the mod 2 addition function of a linear feedback shift register and non-zero slopes at those values.
Some embodiments of the invention are continuous time systems. A continuous time method may use the first delayed actuating signal as the first input and the second delayed actuating signal as the second input. A continuous time apparatus may do the same.
Other embodiments of the invention are discrete time systems. A discrete time method periodically samples the first delayed actuating signal to produce a sample that may be used as the first input and periodically samples the second delayed actuating signal to produce a sample that may be used as the second input. To implement the discrete time method, a discrete time apparatus will incorporate a sampling device for each delayed actuating signal. Each sampling device may further comprise an averaging device, such as a low pass filter, and a sample and hold element. One averaging device will produce a first signal average by averaging the first delayed actuating signal. The associated sample and hold element will produce the first input by sampling the first signal average. The second sampling device will be similar. The sample and hold element may rely on a chip clock signal for proper timing of the sampling, and may further be driven by the chip clock signal.
The method or apparatus may further synchronize the pseudo-random noise sequence that is generated with a reference input signal. As noted above, achieving synchronization is known as acquisition. To acquire a reference input signal, the method requires the output signal to be superposed on the reference input signal to produce the actuating signal. This is accomplished in the apparatus by means of an adder incorporated into the feedback connection. The adder implements the superposition required by the method and causes the output signal to acquire the reference input signal over time. The chip clock signal may be generated by a phase locked loop in signal communication with the reference input signal or the output signal. It may alternatively be received via a sideband carrier of the reference input signal.
In embodiments that acquire a reference input signal, the method or apparatus may be part of a receiver. In such embodiments, the reference input signal may be a pseudo-random noise signal that is modulated with a message signal. The reference input signal may be received by an input device which is part of the apparatus. The message signal may further be recovered from the reference input signal. A demodulator in the apparatus may be used to recover the message signal. Such a receiver may also synchronize with a reference input signal that is an unmodulated pseudo-random noise signal.
The receiver may further be part of a spread spectrum communication system. In such embodiments, a linear feedback shift register may be used to generate a pseudo-random noise signal. Alternatively, an analog feedback shift register may be used to generate the pseudo-random noise signal. The pseudo-random noise signal may be modulated with a message signal to create a transmission signal. Finally, in related embodiments the receiver may receive a corrupted and/or attenuated transmission signal as the reference input signal.
The foregoing and other objects, aspects, features, and advantages of the invention will become more apparent from the following description and from the claims.